1. Field of the Invention
The present invention relates, in general, to a printed circuit board (PCB) and a method of fabricating the same, and more particularly, to a PCB and a method of fabricating the same, in which the thickness of a circuit pattern is decreased to thus realize a fine circuit, the circuit pattern is embedded in an insulating layer to thus decrease the thickness of a PCB, and the time and cost required for the process of fabricating a PCB are decreased.
2. Description of the Related Art
According to the trend in which an electronic product is fabricated to be light, slim, short and small and to have multiple functions, a package mounted to the electronic product need be thin. Thus, a substrate, which is an important component of the package, is required to be thin and to have high density.
FIGS. 1A to 1D are sectional views sequentially illustrating the process of fabricating a PCB according to a conventional technique.
As illustrated in FIG. 1A, a metal layer laminate 100, in which a metal layer 104 is laminated on both surfaces of an insulating layer 102, is prepared.
Next, as illustrated in FIG. 1B, a via hole 106 is formed through the metal layer laminate by drilling.
After the formation of the via hole 106, an electroless copper plating layer 108 and a copper electroplating layer 110 are formed on the inner wall of the via hole 106 and on the metal layer 104 through electroless copper plating and copper electroplating, as illustrated in FIG. 1C.
After the formation of the electroless copper plating layer 108 and the copper electroplating layer 110, a dry film (not shown) is applied on the copper electroplating layer 110, and the portion of the dry film other than the portion of the dry film corresponding to a circuit pattern is removed through exposure and development.
Next, the copper electroplating layer 110, exposed by removing the portion of the dry film, the electroless copper plating layer 108, and the metal layer 104 are etched using an etchant, thus forming a circuit pattern 112 on both surfaces of the insulating layer 102, as illustrated in FIG. 1D.
However, the method of fabricating the PCB according to the conventional technique is disadvantageous because the circuit pattern 112, composed of the metal layer 104, the electroless copper plating layer 108, and the copper electroplating layer 110, is formed on both surfaces of the insulating layer 102, and thus the circuit pattern 110 is thick, and also, the circuit pattern 112 is formed to be exposed on both surfaces of the insulating layer 102, undesirably increasing the thickness of the PCB.
Further, the method of fabricating the PCB according to the conventional technique is disadvantageous because the circuit pattern 112 is composed of the metal layer 104, the electroless copper plating layer 108 and the copper electroplating layer 110, and thus, upon the formation of the circuit pattern 112, the over-etching of the outer portion of the circuit pattern 112 or the under-etching of the inner portion of the circuit pattern 112 may occur, making it difficult to realize a predetermined width, that is, a pitch, between adjacent circuit patterns, with the result that a fine circuit is not realized.
Furthermore, the method of fabricating the PCB according to the conventional technique is disadvantageous because the circuit pattern is formed using electroless copper plating and copper electroplating, undesirably increasing the time required for the process of fabricating a PCB.